posted on 2024-11-12, 16:28authored bySubahar Arivalagan, Britto Pari James, Man-Fai Leung
Mobile technology is currently trending toward supporting multiple communication standards on a single device. This means that some reconfigurable techniques must be the foundation of their design. The two essential requirements of channel filters are minimized complexity and reconfigurability. In this research, a novel extension of Frequency Response Masking (FRM) was investigated by employing Time Division Multiplexing (TDM)-based single Multiply and Accumulate (MAC) architecture using the principle of resource sharing to realize multiple sharp filter responses from a single prototype constant group delay low pass filter. This paper uses a single multiply and add units regardless of the quantity of channels and taps. The suggested reconfigurable filter was synthesized on technology based on 0.18-µm CMOS and put into practice. Further trials were carried out on Virtex-II 2v3000ff1152-4 FPGA device. The outcomes revealed that the suggested channel filter, which was synthesized using FPGA, provides 21.36% of the area curtail and 14.88% of power scaling down on average and put into practice using ASIC provides 5.18% of the area reduction and 9.08% of power scaling down on average.